TestOK Demo →
A bench with a printed circuit board being probed by an oscilloscope, with floating UI cards showing measurement values
An AI design-aware layer for the bench

From datasheet
to diagnosis.

TestOK reads your board's design documents, drives the bench instruments, and tells you exactly what's wrong — closing the loop between design intent and bench reality.

testok-bench.vercel.app · no sign-in needed · free

A typical run

Pass, fail, and why — in one card.

Every run produces a closed-loop verdict that cites the actual readings. No black-box scores; every claim points back at a measurement you can re-check yourself.

Closed-loop verdict
FAIL
1 of 3 checks failed — output ripple above 15 mV limit.
PASS
Output voltage (500 mA load)
3.299 V · target 3.300 V ± 49 mV
PASS
Output voltage (no load)
3.302 V · target 3.300 V ± 49 mV
FAIL
Output ripple (500 mA load)
48.09 mV · limit ≤ 15 mV
Diagnosis

High output ripple, DC regulation clean — output capacitor.

Output ripple measured TP3: 48.09 mV against a 15 mV limit (3.2× over spec). DC output voltage is within spec at every load point (TP1: 3.299 V, TP2: 3.302 V), so the pass device, the reference and the feedback loop are healthy. A ripple-only failure of this magnitude points to the output capacitor — most likely an under-valued or high-ESR COUT.

The problem

The bench has no idea what your board is supposed to do.

Bring-up is the slowest part of hardware. Engineers spend hours probing rails, cross-referencing the datasheet on one monitor and the oscilloscope on another, writing throwaway test scripts, and second-guessing marginal readings. The instruments capture data; they don't understand the design.

Bench bring-up should take an hour. It takes a week.

Left: an engineer hunched over a cluttered workbench, hand-writing notes. Right: the same engineer relaxed in front of a clean dashboard showing a checkmark.

Before TestOK · After TestOK

How it works

Three stages, one closed loop.

Drop in a datasheet (or pick from the library). TestOK understands the spec, drives the instruments, and reasons about the result — citing the actual readings so the diagnosis is auditable.

Three-panel illustration: a datasheet feeding a test plan, then bench instruments connected to a PCB, then a verdict card with a checkmark.
01 Understand
Read the context

PDF, Excel or markdown — the LLM extracts the test plan, the limits and the instruments each check needs.

02 Measure
Drive the bench

PSU, electronic load, DMM, scope, spectrum analyser — over VISA, in the simulator, or any mix. Every SCPI exchange is logged.

03 Infer
Diagnose the result

Pass / fail per check, plus a structured diagnosis that cites the actual readings — and tells you the most likely root cause and next step.

Same loop, whether the bench is real instruments over VISA or the built-in simulator. The diagnosis quality doesn't change.

Watch it run

The full loop, end to end.

One real run on the HW-131 LDO board — read the context, pick the board, model and test, drive the bench, catch the ripple fault, trace it to the output capacitor on the schematic and the board, and export the report.

What you get

A bench that understands the design.

Datasheets in, test plans out

Upload the datasheet (PDF / Excel / CSV / Markdown). TestOK extracts the electrical-characteristics table and turns each row into an executable check — with limits, conditions, and which instrument it needs.

Real bench over VISA

Drive real Keysight, Rigol or generic SCPI instruments through the same UI. No new framework to learn — the test plan you saw simulated runs unchanged on the live bench.

Cited diagnoses, not vibes

Every diagnosis paragraph cites the actual readings inline (TP1: 4.987 V). You see why the model said what it said. No black-box conclusions.

Audit-ready reports

Export any run as a branded PDF, self-contained HTML, or JSON. Optional SCPI log + source-document appendix make the report self-contained for QA / compliance.

See an example: PDF · HTML

Bring your own boards

Upload a custom board's docs in one dialog — datasheet + BOM + test procedure + a real photo of the PCB. The bench artwork shows the photo so the instrument probes appear to land on the actual board.

Backend of your choice

Rule-based mock (offline, deterministic), local model via Ollama (on-prem, no cloud), or Anthropic Claude (the highest-quality free-form reasoning). Swap with one click.

Get in touch

Building something on a bench? Let's talk.

Whether you'd like to pilot TestOK on a real board, partner on an instrument integration, or invest — the inbox is open.